IDT72511L25J データシートの表示（PDF） - Integrated Device Technology

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IDT72511L25J

PARALLEL BIDIRECTIONAL FIFO 512 x 18 & 1024 x 18

Integrated Device Technology 

IDT72511/IDT72521

BIDIRECTIONAL FIRST-IN FIRST-OUT MEMORY

SINGLE WORD DMA TRANSFER

tCKH

2 to 5 cycles

tCKC

t CKL

CLK

REQ

tREQS

ACK

WRITE

(R/WB)

WB (or DSB)

t REQH

tACKL

Output

DB0-DB17

READ

(R/WB)

RB (or DSB)

Input

DB0-DB17

MILITARY AND COMMERCIAL TEMPERATURE RANGES

1 cycle

1 to 2 cycles

taCKL

tb LZ

tbA

taCKL

tb DV

tbHZ

tACKL

tbDS

tACKL

tb DH

BLOCK DMA TRANSFER

CLK

REQ

2 to 5

cycles

ACK, R/WB

RB, WB (or DSB)

1 to 2

cycles

2 to 5

cycles

1 to 2

cycles

Figure 17. Port B Read and Write DMA timing. Peripheral Interface Mode Only

5.32

2668 drw 18

24

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