74LV4052D データシートの表示（PDF） - NXP Semiconductors.

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74LV4052D

Dual 4-channel analog multiplexer/demultiplexer

NXP Semiconductors. 

Nexperia

74LV4052

Dual 4-channel analog multiplexer/demultiplexer

5. Pinning information

5.1 Pinning

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= 

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Fig 5. Pin configuration for SO16 and (T)SSOP16

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 <

 =

 <

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 6

 6

DDD

5.2 Pin description

Table 2. Pin description

Symbol

Pin

2Y0

1

2Y2

2

2Z

3

2Y3

4

2Y1

5

E

6

VEE

7

GND

8

S1

9

S0

10

1Y3

11

1Y0

12

1Z

13

1Y1

14

1Y2

15

VCC

16

Description

independent input or output

independent input or output

common input or output

independent input or output

independent input or output

enable input (active LOW)

negative supply voltage

ground (0 V)

select logic input

select logic input

independent input or output

independent input or output

common input or output

independent input or output

independent input or output

positive supply voltage

74LV4052

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 5 — 17 March 2016

© Nexperia B.V. 2017. All rights reserved

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