T1/E1 CLOCK MULTIPLIER
DATASHEET
ICS548-05
Description
The ICS548-05 is a low-cost, low-jitter,
high-performace clock synthesizer designed to
produce x16 and x24 clocks from T1 and E1
frequencies. Using IDT’s patented analog/digital
Phase- Locked Loop (PLL) techniques, the device uses
a crystal or clock input to synthesize popular
communications frequencies. Power down modes allow
the chip to turn off completely, or the PLL and clock
output to be turned off separately.
IDT manuafactures the largest variety of
communications clock synthesizers for all applications.
Consult IDT to eliminate VCXO’s, crystals, and
oscillators from your board.
Features
• Packaged in 16-pin TSSOP
• Available in Pb (lead) free package
• Ideal for telecom/datacom chips
• Replaces oscillators
• 3.3 V or 5 V operation
• Uses a crystal or clock input
• Produces 24.704, 37.056, 32.768, or 49.152 MHz
• Includes Power-down features
• Advanced, low-power, sub-micron CMOS process
• See also the MK2049-34 for generating
• Industrial temperature range available
Block Diagram
MSEL
REFEN
PDCLK
1.544 MHz or
2.048 MHz
clock or crystal
input
X1/ICLK
X2
Input
Buffer/
Crystal
Oscillator
Optional crystal
capacitors
X16 or x24
PLL/Clock
Synthesis
Circuitry
CLK
REFOUT
IDT® T1/E1 CLOCK MULTIPLIER
1
ICS548-05 REV D 091511