II. Manufacturing Information
A. Description/Function: Low-Cost, Micropower, Low-Dropout, High-Output-Current, SOT23 Voltage References
B. Process:
B12 (Standard 1.2 micron silicon gate CMOS)
C. Number of Device Transistors:
117
D. Fabrication Location:
California or Oregon, USA
E. Assembly Location:
Malaysia or Thailand
F. Date of Initial Production:
March, 2001
III. Packaging Information
A. Package Type:
3-Pin SOT23
B. Lead Frame:
Copper or Alloy 42
C. Lead Finish:
Solder Plate
D. Die Attach:
Silver-filled Epoxy
E. Bondwire:
Gold (1.0 mil dia.)
F. Mold Material:
Epoxy with silica filler
G. Assembly Diagram:
# 05-0901-0179
H. Flammability Rating:
Class UL94-V0
I. Classification of Moisture Sensitivity
per JEDEC standard JESD22-112: Level 1
IV. Die Information
A. Dimensions:
B. Passivation:
C. Interconnect:
D. Backside Metallization:
E. Minimum Metal Width:
F. Minimum Metal Spacing:
G. Bondpad Dimensions:
H. Isolation Dielectric:
I. Die Separation Method:
44 x 31mils
Si3N4/SiO2 (Silicon nitride/ Silicon dioxide)
Aluminum/Si (Si = 1%)
None
1.2 microns (as drawn)
1.2 microns (as drawn)
5 mil. Sq.
SiO2
Wafer Saw