74LV4094D データシートの表示（PDF） - NXP Semiconductors.
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74LV4094D Datasheet PDF : 20 Pages
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Nexperia
74LV4094
8-stage shift-and-store bus register
6. Pinning information
6.1 Pinning
/9
675
'
&3
43
43
43
43
*1'
Fig 5. Pin configuration SO16, SSOP16 and TSSOP16
9&&
2(
43
43
43
43
46
46
DDQ
6.2 Pin description
Table 2. Pin description
Symbol
STR
D
CP
QP0 to QP7
GND
QS1, QS2
OE
VCC
Pin
1
2
3
4, 5, 6, 7, 14, 13, 12, 11
8
9,10
15
16
Description
strobe input
data input
clock input
parallel output
ground supply voltage
serial output
output enable input
supply voltage
74LV4094
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 18 March 2016
© Nexperia B.V. 2017. All rights reserved
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