2.3
0mA
2.2
2mA
2.1
4mA
2.0
6mA
1.9
1.8
1.7
2.7 2.8 2.9 3.0 3.1 3.2 3.3 3.4 3.5
VS – Volts
TPC 19. Maximum VDN Voltage vs. VS by Load
Current
AD8314
2.3
2.2
SHADING INDICATES
؎3 SIGMA
2.1
2.0
1.9
1.8
1.7
2.7 2.8 2.9 3.0 3.1 3.2 3.3 3.4 3.5
VS – Volts
TPC 22. Maximum VDN Voltage vs. VS with 3 mA
Load
VUP
AVERAGE: 128 SAMPLES
VUP 500mV/VERTICAL
DIVISION
VDN GND
VUP GND
GND
VUP 500mV/VERTICAL
DIVISION
VPOS AND ENABLE
1s PER
HORIZONTAL
DIVISION
2V PER
VERTICAL
DIVISION
TPC 20. Power-On and Power-Off Response,
Measurement Mode
HP8648B 10MHz REF OUTPUT
SIGNAL
GENERATOR
–33dBV RF OUT
EXT TRIG
HP8116A
PULSE
GENERATOR
TRIG
OUT
PULSE
OUT
AD811 49.9⍀
52.3⍀
1 RFIN
VPOS 8
2 ENBL
V DN 7
AD8314
3 VSET
V UP 6
NC 4 FLTR
COMM 5
NC = NO CONNECT
732⍀
TEK P6204
FET PROBE
TEK P6204
FET PROBE
TRIG
TEK
TDS784C
SCOPE
TPC 21. Test Setup for Power-On and Power-Off
Response
AVERAGE: 128 SAMPLES
200mV PER
VERTICAL
DIVISION
VDN
VDN GND
GND
VPOS AND ENABLE
2V PER
VERTICAL
DIVISION
100ns PER
HORIZONTAL
DIVISION
TPC 23. Power-On Response, VDN, Controller
Mode with VSET Held Low
HP8648B 10MHz REF OUTPUT
SIGNAL
GENERATOR
RF OUT
EXT TRIG
HP8112A
PULSE
GENERATOR
TRIG
OUT
PULSE
OUT
AD811
49.9⍀
52.3⍀
+0.2
1 RFIN
VPOS 8
732⍀
2 ENBL
V DN 7
AD8314
TEK P6204
FET PROBE
3 VSET
V UP 6 NC
TRIG
TEK
TDS784C
SCOPE
NC 4 FLTR
COMM 5
NC = NO CONNECT
TPC 24. Test Setup for Power-On Response at
V_DN Output, Controller Mode with VSET Pin
Held Low
REV. A
–7–