Data Sheet
CS#
SCLK
Figure 4.8 Dual Output Command
IO0
IO1
Phase
7 6 5 4 3 2 1 0 31 30 29 0
Instruction
Address
6 Dummy
6 4206 420
7 5317 531
Data 1 Data 2
CS
SCLK
IO0
IO1
IO2
IO3
Phase
Figure 4.9 Quad Output Command without Latency
7 6 5 4 3 2 1 0 31 1 0 4 0 4 0 4 0 4 0 4 0 4
5151515151 5
6262626262 6
7373737373 7
Instruction
Address Data 1 Data 2 Data 3 Data 4 Data 5 ...
CS
SCLK
IO0
IO1
Phase
Figure 4.10 Dual I/O Command
7 6 5 4 3 2 1 0 30 2 0
31 3 1
Instruction
Address
Dummy
6420 642 0
7531 753 1
Data 1
Data 2
CS
SCLK
IO0
IO1
IO2
IO3
Phase
Figure 4.11 Quad I/O Command
7 6 5 4 3 2 1 0 28 4 0 4
29 5 1 5
30 6 2 6
31 7 3 7
Instruction
Address Mode
Dummy
4 0 40 4 0 40
5 1 51 5 1 51
6 2 62 6 2 62
7 3 73 7 3 73
D1 D2 D3 D4
July 12, 2012 S25FL128S_256S_00_05
S25FL128S and S25FL256S
25