Integrated
Circuit
Systems, Inc.
FIGURE 3A, 3B - TIMING WAVEFORMS
CLK
nCLK
Q
VDDO/2
Vpp
tPHL
ICS8702
LOW SKEW ¸1, ¸2
CLOCK GENERATOR
tPLH
FIGURE 3A - PROPAGATION DELAYS
fin = 200MHz, Vpp = 300mV, tr = tf = 200ps
nMR/OE,
BANK_ENx
3.3V
BANK_ENx
0V
Q VOH
VDDO/2
VDDO/2
Q VOL
tPHZ
VOH - 300mV
tPZH
tPLZ
VOL + 300mV
FIGURE 3B - DISABLE AND ENABLE TIMES
fin = 10MHz, Vamp = 3.3V, tr = tf = 600ps
tPZL
8702
www.icst.com
8
REV. A - AUGUST 7, 2000