ADP5034AREZ-1 データシートの表示（PDF） - Analog Devices
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ADP5034AREZ-1 Datasheet PDF : 28 Pages
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Data Sheet
Dual 3 MHz, 1200 mA Buck
Regulators with Two 300 mA LDOs
ADP5034
FEATURES
regulators operate in PWM mode when the load is above a pre-
Main input voltage range: 2.3 V to 5.5 V
Two 1200 mA buck regulators and two 300 mA LDOs
24-lead, 4 mm × 4 mm LFCSP or 28-lead TSSOP package
defined threshold. When the load current falls below a predefined
threshold, the regulator operates in power save mode (PSM),
improving the light load efficiency.
Regulator accuracy: ±1.8%
Factory programmable or external adjustable VOUTx
3 MHz buck operation with forced PWM and auto PWM/PSM
Table 1. Family Models
Model Channels
Maximum
Current Package
modes
BUCK1/BUCK2: output voltage range from 0.8 V to 3.8 V
LDO1/LDO2: output voltage range from 0.8 V to 5.2 V
LDO1/LDO2: input supply voltage from 1.7 V to 5.5 V
LDO1/LDO2: high PSRR and low output noise
ADP5023 2 Buck,1 LDO
ADP5024 2 Buck,1 LDO
ADP5034 2 Buck,2 LDOs
800 mA,
300 mA
1.2 A,
300 mA
1.2 A,
300 mA
LFCSP (CP-24-10)
LFCSP (CP-24-10)
LFCSP (CP-24-10),
TSSOP (RE-28-1)
APPLICATIONS
ADP5037 2 Buck,2 LDOs
800 mA,
300 mA
LFCSP (CP-24-10)
Power for processors, ASICS, FPGAs, and RF chipsets
Portable instrumentation and medical devices
ADP5033 2 Buck,2 LDOs with 800 mA,
2 EN pins
300 mA
WLCSP (CB-16-8)
Space constrained devices
The two bucks operate out of phase to reduce the input capaci-
GENERAL DESCRIPTION
The ADP5034 combines two high performance buck regulators
and two low dropout (LDO) regulators. It is available in either a
24-lead 4 mm × 4 mm LFCSP or a 28-lead TSSOP package.
tor requirement. The low quiescent current, low dropout voltage,
and wide input voltage range of the ADP5034 LDOs extend the
battery life of portable devices. The ADP5034 LDOs maintain
power supply rejection greater than 60 dB for frequencies as
high as 10 kHz while operating with a low headroom voltage.
The high switching frequency of the buck regulators enables tiny
multilayer external components and minimizes the board space.
When the MODE pin is set to high, the buck regulators operate in
forced PWM mode. When the MODE pin is set to low, the buck
Regulators in the ADP5034 are activated through dedicated
enable pins. The default output voltages can be externally set in
the adjustable version, or factory programmable to a wide range
of preset values in the fixed voltage version.
TYPICAL APPLICATION CIRCUIT
2.3V TO
5.5V
1.7V TO
5.5V
CAVIN
0.1µF
C1
4.7µF
ON
OFF
AVIN
VIN1
EN1
HOUSEKEEPING
BUCK1
EN1 MODE
C2
4.7µF
VIN2
EN2
C3
1µF
ON
OFF
C4
1µF
EN3
VIN3
EN4
VIN4
MODE
BUCK2
EN2
EN3 LDO1
(ANALOG)
EN4
LDO2
(DIGITAL)
ADP5034
AGND
VOUT1
SW1
FB1
PGND1
MODE
VOUT2
SW2
FB2
PGND2
VOUT3
FB3
VOUT4
FB4
L1 1µH
R1
R2
VOUT1 AT
1200mA
C5
10µF
PWM
PSM/PWM
L2 1µH
R3
R4
R5
R6
VOUT2 AT
1200mA
C6
10µF
VOUT3 AT
300mA
C7
1µF
R7
R8
VOUT4 AT
300mA
C8
1µF
Figure 1.
Rev. E
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