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SSM2475S(Rev0) データシートの表示(PDF) - Analog Devices

部品番号
コンポーネント説明
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SSM2475S
(Rev.:Rev0)
ADI
Analog Devices 
SSM2475S Datasheet PDF : 16 Pages
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SSM2275/SSM2475
THEORY OF OPERATION
input transistors, Q1 and Q2, when very large differential volt-
The SSM2275 and SSM2475 are low noise and low distortion
rail-to-rail output amplifiers that are excellent for audio applica-
tions. Based on the OP275 audiophile amplifier, the SSM2275/
ages are applied. If the device’s differential voltage could exceed
± 7 V, then the input current should be limited to less than
± 5 mA. This can be easily done by placing a resistor in series
SSM2475 offers many similar performance characteristics with
with both inputs. The minimum value of the resistor can be
the advantage of a rail-to-rail output from a single supply
determined by:
source. Its low input voltage noise figure of 7 nV/Hz allows the
device to be used in applications requiring high gain, such as
microphone preamplifiers. Its 11 V/µs slew rate also allows the
SSM2275/SSM2475 to produce wide output voltage swings
RIN
= VDIFF , MAX
0.01
7
(1)
while maintaining low distortion. In addition, its low harmonic
There are also ESD protection diodes that are connected from
distortion figure of 0.0006% makes the SSM2275 and
each input to each power supply rail. These diodes are normally
SSM2475 ideal for high quality audio applications.
reversed biased, but will turn on if either input voltage exceeds
OBSOLETE Figure 27 shows the simplified schematic for a single amplifier.
The amplifier contains a Butler Amplifier at the input. This
front-end design uses both bipolar and MOSFET transistors in
the differential input stage. The bipolar devices, Q1 and Q2,
improve the offset voltage and achieve the low noise perfor-
mance, while the MOS devices, M1 and M2, are used to obtain
higher slew rates. The bipolar differential pair is biased with a
proportional-to-absolute-temperature (PTAT) bias source, IB1,
while the MOS differential pair is biased with a non-PTAT
source, IB2. This results in the amplifier having a constant gain-
bandwidth product and a constant slew rate over temperature.
The amplifier also contains a rail-to-rail output stage that can
sink or source up to 50 mA of current. As with any rail-to-rail
output amplifier the gain of the output stage, and consequently
the open loop gain of the amplifier, is proportional to the load
resistance. With a load resistance of 50 k, the dc gain of the
amplifier is over 110 dB. At load currents less than 1 mA, the
either supply rail by more than 0.6 V. Again, should this condi-
tion occur the input current should be limited to less than
± 5 mA. The minimum resistor value should then be:
RIN
= VIN , MAX
5 mA
(2)
In practice, RIN should be placed in series with both inputs to
reduce offset voltages caused by input bias current. This is
shown in Figure 28.
V+
RIN
RIN
output of the amplifier can swing to within 30 mV of either sup-
+
ply rail. As load current increases, the maximum voltage swing
of the output will decrease. This is due to the collector to emit-
ter saturation voltage of the output transistors increasing with an
increasing collector current.
V–
Figure 28. Using Resistors for Input Overcurrent Protection
Input Overvoltage Protection
The maximum input differential voltage that can be applied to
the SSM2275/SSM2475 is ± 7 V. A pair of internal back-to-back
Zener diodes are connected across the input terminals. This
prevents emitter-base junction breakdown from occurring to the
Output Voltage Phase Reversal
The SSM2275/SSM2475 was designed to have a wide common-
mode range and is immune to output voltage phase reversal with
an input voltage within the supply voltages of the device. How-
ever, if either of the device’s inputs exceeds 0.6 V above the posi-
IB2
VCC
Q1
IN–
Q2
IN+
REV. 0
M1
M2
IB1
Figure 27. Simplified Schematic
–9–
OUT
CF1
VEE

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