LTM4630 データシートの表示（PDF） - Linear Technology
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LTM4630 Datasheet PDF : 34 Pages
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LTM4630
APPLICATIONS INFORMATION
SW Pins
The SW pins are generally for testing purposes by moni-
toring these pins. These pins can also be used to dampen
out switch node ringing caused by LC parasitic in the
switched current paths. Usually a series R-C combina-
tion is used called a snubber circuit. The resistor will
dampen the resonance and the capacitor is chosen to
only affect the high frequency ringing across the resistor.
If the stray inductance or capacitance can be measured or
approximated then a somewhat analytical technique can
be used to select the snubber values. The inductance is
usually easier to predict. It combines the power path board
inductance in combination with the MOSFET interconnect
bond wire inductance.
First the SW pin can be monitored with a wide bandwidth
scope with a high frequency scope probe. The ring fre-
quency can be measured for its value. The impedance Z
can be calculated:
ZL = 2πfL,
where f is the resonant frequency of the ring, and L is the
total parasitic inductance in the switch path. If a resistor
is selected that is equal to Z, then the ringing should be
dampened. The snubber capacitor value is chosen so that
its impedance is equal to the resistor at the ring frequency.
Calculated by: ZC = 1/(2πfC). These values are a good place
to start with. Modification to these components should
be made to attenuate the ringing with the least amount
of power loss.
Temperature Monitoring
A diode connected PNP transistor is used for the TEMP
monitor function by monitoring its voltage over tempera-
ture. The temperature dependence of this diode voltage
can be understood in the equation:
VD
=
nVT
ln
ID
IS
where VT is the thermal voltage (kT/q), and n, the ideality
factor, is 1 for the diode connected PNP transistor be-
ing used in the LTM4630. IS is expressed by the typical
empirical equation:
IS
= I0
exp
– VG0
VT
where I0 is a process and geometry dependent current, (I0
is typically around 20k orders of magnitude larger than IS
at room temperature) and VG0 is the band gap voltage of
1.2V extrapolated to absolute zero or –273°C.
If we take the IS equation and substitute into the VD equa-
tion, then we get:
VD
=
VG0
–
kT
q
ln
I0
ID
,
VT
=
kT
q
The expression shows that the diode voltage decreases
(linearly if I0 were constant) with increasing temperature
and constant diode current. Figure 6 shows a plot of VD
vs Temperature over the operating temperature range of
the LTM4630.
If we take this equation and differentiate it with respect to
temperature T, then:
dVD = – VG0 – VD
dT
T
This dVD/dT term is the temperature coefficient equal to
about –2mV/K or –2mV/°C. The equation is simplified for
the first order derivation.
Solving for T, T = –(VG0 – VD)/(dVD/dT) provides the
temperature.
1st Example: Figure 8 for 27°C, or 300K the diode
voltage is 0.598V, thus, 300K = –(1200mV – 598mV)/
–2.0 mV/K)
2nd Example: Figure 8 for 75°C, or 350K the diode
voltage is 0.50V, thus, 350K = –(1200mV – 500mV)/
–2.0mV/K)
4630fa
18
For more information www.linear.com/LTM4630
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