UPD720133 データシートの表示（PDF） - NEC => Renesas Technology

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UPD720133

USB2.0 to IDE Bridge

NEC => Renesas Technology 

µPD720133

USB suspend and resume on high-speed system bus

USB bus

Reversion to full-speed mode

High-speed packet

tSPD

T0

tCtSR

tSUS

FSJ

Power will be down

Reversion to high-speed mode

High-speed packet

FSK

tRHS

Note time required to relock PLL

and stabilize oscillator.

IDE PIO mode timing

IDECS1B, IDECS0B H

IDEEA2-IDEEA0 L

IDEIORB H

IDEIOWB L

IDED15-IDED0 H

(WRITE) L

IDED15-IDED0 H

(READ) L

IDEIORDY H

L

IDE multi word DMA mode timing

IDECS1B, IDECS0B

H

L

IDEDRQ

H

L

IDEDAKB H

L

IDEIORB H

IDEIOWB L

IDED15-IDED0 H

(READ) L

IDED15-IDED0 H

(WRITE) L

t1

t0

t2

t3

t5

tA

tRD tC

tB

t9

t2i

t4

t6Z

t6

tM

tI

tE

tLr/tLw

t0

tD

tKr/tKw

tGr

tF

tGw

tH

tN

tJ

tZ

32

Preliminary Data Sheet S17100EJ2V0DS

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