UPD720133 データシートの表示（PDF） - NEC => Renesas Technology

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UPD720133

USB2.0 to IDE Bridge

NEC => Renesas Technology 

BLOCK DIAGRAM

CPU Core

(V30MZ)

RAM

2 Kbytes x 2

ROM

12 Kbytes

Bus Bridge

DMAC

INTC

µPD720133

EPC2_V2

DCC

IDEC_V2

Timer

PIO

GPIO

PHY_V2

USB Bus

IDE Bus

GPIO

Direct Bus

Direct Command Bus

Serial

ROM

V30MZ

RAM

ROM

PHY_V2

EPC2_V2

IDEC_V2

DCC

Bus Bridge

INTC

GPIO

PIO

: CISC CPU core

: 4-Kbyte work RAM for firmware

: 12-Kbyte ROM for built-in firmware

: USB2.0 transceiver with serial interface engine

: Endpoint controller

: IDE controller

: ATA direct command controller

: Internal / external bus controller and DMA controller

: Interrupt controller (82C59 like)

: General purpose 3-bit I/O controller

: Multipurpose 2-bit I/O controller

2

Preliminary Data Sheet S17100EJ2V0DS

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