256Mb: x4, x8, x16
DDR SDRAM
Figure 21: WRITE Burst
T0
CK#
CK
COMMAND
WRITE
ADDRESS
Bank a,
Col b
tDQSS (NOM)
DQS
T1
NOP
tDQSS
T2 T2n T3
NOP
NOP
DQ
DI
b
DM
tDQSS (MIN)
DQS
DQ
DM
tDQSS
DI
b
tDQSS (MAX)
DQS
DQ
DM
tDQSS
DI
b
DON’T CARE
TRANSITIONING DATA
NOTE:
1. DI b = data-in for column b.
2. Three subsequent elements of data-in are applied in the programmed order following DI b.
3. An uninterrupted burst of 4 is shown.
4. A10 is LOW with the WRITE command (auto precharge is disabled).
09005aef8076894f
256MBDDRx4x8x16_2.fm - Rev. F 6/03 EN
30
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©2003 Micron Technology, Inc.