LFSC3GA40E-5FFN1020I データシートの表示（PDF） - Lattice Semiconductor

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LFSC3GA40E-5FFN1020I

LatticeSC/M Family Data Sheet Introduction

Lattice Semiconductor 

Lattice Semiconductor

Figure 2-13. DLL to PLL

CLKI

DLL

CLKOS

SMI Bus

Figure 2-14 shows a shift of only CLKOP out in time.

Figure 2-14. PLL to DLL

CLKI

PLL

CLKOP

Architecture

LatticeSC/M Family Data Sheet

CLKOP

PLL

CLKOS

DLL

CLKOS

Figure 2-15 shows a shift of only CLKOS out in time.

Figure 2-15. PLL to DLL

CLKI

PLL

CLKOS

SMI Bus

DLL

CLKOS

SMI Bus

For further information on the DLL, please see details of additional technical documentation at the end of this data

sheet.

sysMEM Memory Block

The sysMEM block can implement single port, true dual port, pseudo dual port or FIFO memories. Dedicated FIFO

support logic allows the LatticeSC devices to efficiently implement FIFOs without consuming LUTs or routing

resources for flag generation. Each block can be used in a variety of depths and widths as shown in Table 2-5.

Memory with ranges from x1 to x18 in all modes: single port, pseudo-dual port and FIFO also providing x36.

2-13

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