Nexperia
74LVC1G06-Q100
Inverter with open-drain output
13 Abbreviations
Table 11. Abbreviations
Acronym
CMOS
DUT
ESD
HBM
MM
TTL
Description
Complementary Metal-Oxide Semiconductor
Device Under Test
ElectroStatic Discharge
Human Body Model
Machine Model
Transistor-Transistor Logic
14 Revision history
Table 12. Revision history
Document ID
74LVC1G06_Q100 v.3
Modifications:
74LVC1G06_Q100 v.2
Modifications:
74LVC1G06_Q100 v.1
Release date Data sheet status
Change notice Supersedes
20180522
Product data sheet
-
74LVC1G06_Q100 v.2
• The format of this data sheet has been redesigned to comply with the identity guidelines of
Nexperia.
• Legal texts have been adapted to the new company name where appropriate.
20161207
Product data sheet
-
74LVC1G06_Q100 v.1
• Table 7: The maximum limits for leakage current and supply current have changed.
• Table 7: OFF-state output current parameter added.
20120807
Product data sheet
-
-
74LVC1G06_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 22 May 2018
© Nexperia B.V. 2018. All rights reserved.
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