CY7C65213-28PVXI データシートの表示（PDF） - Cypress Semiconductor

部品番号

コンポーネント説明

メーカー

CY7C65213-28PVXI

USB-UART LP Bridge Controller

Cypress Semiconductor 

CY7C65213

CY7C65213A

USB to RS485 Application

CY7C65213A can be configured as USB to UART interface. This

UART interface operates at TTL level and it can be converted to

RS485 interface using a GPIO and any half duplex RS485

transceiver IC (to convert TTL level to RS485 level) as shown in

following figure1. This GPIO (TXDEN) enables and disables the

transmission of data through RS485 transceiver IC based on

availability of character in UART buffer of CY7C65213A. This

GPIO can be configured using USB-Serial Configuration utility.

Figure 6 shows timing diagram of this GPIO.

RS485 is a multi-drop network – that is, many devices can

communicate with each other over a single two wire cable

connection. The RS485 cable requires to be terminated at each

end of the cable.

Figure 5. USB to RS485 Bridge

VCC

USB

CONNECTOR

VBUS

D+

D-

GND

VCC

0.1 uF

VCC

0.1 uF 0.1 uF

1 uF

VCC

VCCIO

USBDP

USBDM

TXD

RXD

USB-UART LP

CY7C65213A

RESET#

VCCD

GPIO7

GPIO6

GPIO2

GPIO3

GPIO4

GPIO5

GPIO0

GPIO1

TXD

RXD

TXDEN

SLEEP#

PWRE#

TXLED#

RXLED#

TXDout

RXDin

1K

1K

VCC VCC

Figure 6. RS485 GPIO (TXDEN) Timing diagram

Document Number: 001-81011 Rev. *M

Page 19 of 29

Share Link: