SC103335VR400B データシートの表示（PDF） - Freescale Semiconductor

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SC103335VR400B

SDRAM/DDR Memory Controller

Freescale Semiconductor 

Figure 1 shows a simplified MPC5200B block diagram.

SDRAM/DDR

603

e300 Core

SDRAM/DDR

Memory Controller

JTAG / COP

Interface

Reset / Clock

Generation

SRAM

16 KB

BestComm

DMA

CommBus

PSC Ethernet I2C

6x

2x

Systems Interface Unit (SIU)

Real-Time Clock

System Functions

Interrupt Controller

GPIO / Timers

Local Plus Controller

PCI Bus Controller

ATA Host Controller

Local

Bus

SPI

USB

J1850 MSCAN

2x

2x

Figure 1. Simplified Block Diagram—MPC5200B

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