HEF40193B データシートの表示（PDF） - NXP Semiconductors.
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HEF40193B Datasheet PDF : 20 Pages
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NXP Semiconductors
HEF40193B
4-bit up/down binary counter
Table 7. Dynamic characteristics …continued
VSS = 0 V; Tamb = 25 C; for test circuit see Figure 7; unless otherwise specified.
Symbol Parameter
Conditions
VDD
Extrapolation formula[1] Min Typ Max Unit
tPLH
LOW to HIGH
CPU to Qn;
propagation delay see Figure 6
5V
10 V
143 ns + (0.55 ns/pF)CL -
59 ns + (0.23 ns/pF)CL -
170 340 ns
70 140 ns
15 V
42 ns + (0.16 ns/pF)CL -
50 100 ns
CPD to Qn;
see Figure 6
5V
10 V
143 ns + (0.55 ns/pF)CL -
59 ns + (0.23 ns/pF)CL -
170 340 ns
70 140 ns
15 V
42 ns + (0.16 ns/pF)CL -
50 100 ns
CPU to TCU;
see Figure 6
5V
10 V
68 ns + (0.55 ns/pF)CL -
29 ns + (0.23 ns/pF)CL -
95 185 ns
40 80 ns
15 V
22 ns + (0.16 ns/pF)CL -
30 60 ns
CPD to TCD;
see Figure 6
5V
10 V
73 ns + (0.55 ns/pF)CL -
29 ns + (0.23 ns/pF)CL -
100 195 ns
40 85 ns
15 V
22 ns + (0.16 ns/pF)CL -
30 65 ns
MR to TCU
5 V 118 ns + (0.55 ns/pF)CL -
145 285 ns
10 V
49 ns + (0.23 ns/pF)CL -
60 115 ns
15 V
37 ns + (0.16 ns/pF)CL -
45 90 ns
PL to Qn
5 V 118 ns + (0.55 ns/pF)CL -
145 290 ns
10 V
49 ns + (0.23 ns/pF)CL -
60 120 ns
15 V
37 ns + (0.16 ns/pF)CL -
45 90 ns
tt
transition time
see Figure 6
5V
10 ns + (1.00 ns/pF)CL -
60 120 ns
10 V
9 ns + (0.42 ns/pF)CL -
30 60 ns
15 V
6 ns + (0.28 ns/pF)CL -
20 40 ns
fmax
maximum frequency see Figure 6
5V
2.5 5
-
MHz
10 V
7
14 -
MHz
15 V
9
18 -
MHz
tW
pulse width
CPU or CPD LOW;
minimum width;
see Figure 6
5V
10 V
15 V
150 75 -
ns
50 25 -
ns
35 20 -
ns
MR input HIGH;
minimum width;
see Figure 6
5V
10 V
15 V
180 90 -
ns
70 35 -
ns
60 30 -
ns
PL input LOW;
minimum width;
see Figure 6
5V
10 V
15 V
120 60 -
ns
45 20 -
ns
30 15 -
ns
trec
recovery time
MR input;
see Figure 6
5V
10 V
125 65 -
ns
70 35 -
ns
15 V
50 25 -
ns
PL input
see Figure 6
5V
10 V
90 45 -
ns
35 15 -
ns
15 V
25 10 -
ns
HEF40193B
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 18 November 2011
© NXP B.V. 2011. All rights reserved.
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