IS62VV25616LL-85MI データシートの表示（PDF） - Integrated Silicon Solution

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IS62VV25616LL-85MI

256K x 16 LOW VOLTAGE, 1.8V ULTRA LOW POWER CMOS STATIC RAM

Integrated Silicon Solution 

IS62VV25616L/LL

ISSI ®

IS62VV25616LL POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range)

Symbol Parameter

ICC

Vcc Dynamic Operating

Supply Current

ICC1

Operating Supply

Current

ISB1

TTL Standby Current

(TTL Inputs)

OR

Test Conditions

VCC = Max.,

Com.

IOUT = 0 mA, f = fMAX Ind.

VCC = Max.,

Com.

IOUT = 0 mA, f = 0

Ind.

VCC = Max.,

Com.

VIN = VIH or VIL

Ind.

CE ≥ VIH , f = 1 MHZ

-70

-85

-100

Min. Max. Min. Max. Min. Max. Unit

— 20

— 15

— 10

mA

— 25

— 20

— 15

—3

—3

—3

mA

—3

—3

—3

— 0.3

— 0.3

— 0.3

mA

— 0.3

— 0.3

— 0.3

ULB Control

VCC = Max., VIN = VIH or VIL

CE = VIL, f = 0, UB = VIH, LB = VIH

ISB2

CMOS Standby

VCC = Max.,

Com.

Current (CMOS Inputs) CE ≥ VCC – 0.2V,

Ind.

VIN ≥ VCC – 0.2V, or

VIN ≤ 0.2V, f = 0

OR

—5

—5

—5

µA

—5

—5

—5

ULB Control

VCC = Max., CE = VIL

VIN ≤ 0.2V, f = 0; UB / LB = VCC – 0.2V

Note:

1. At f = fMAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.

READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range)

Symbol

Parameter

-70

-85

-100

Min. Max.

Min. Max.

Min. Max.

Unit

tRC

Read Cycle Time

70

—

85

—

100

—

ns

tAA

Address Access Time

—

70

—

85

—

100

ns

tOHA

Output Hold Time

10

—

10

—

10

—

ns

tACE

CE Access Time

—

70

—

85

—

100

ns

tDOE

OE Access Time

—

35

—

40

—

50

ns

tHZOE(2)

OE to High-Z Output

—

25

—

25

—

30

ns

tLZOE(2)

OE to Low-Z Output

5

—

5

—

5

—

ns

tHZCE(2)

CE to High-Z Output

0

25

0

25

0

30

ns

tLZCE(2)

CE to Low-Z Output

10

—

10

—

10

—

ns

tBA

LB, UB Access Time

—

70

—

85

—

100

ns

tHZB

LB, UB to High-Z Output

0

25

0

25

0

35

ns

tLZB

LB, UB to Low-Z Output

0

—

0

—

0

—

ns

Notes:

1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 0.9V, input pulse levels of 0.4 to 1.4V and

output loading specified in Figure 1.

2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.

Integrated Silicon Solution, Inc. — 1-800-379-4774

5

PRELIMINARY INFORMATION Rev. 00C

11/30/00

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