W971GG8JB(2010) データシートの表示（PDF） - Winbond

部品番号

コンポーネント説明

メーカー

W971GG8JB
(Rev.:2010)

16M x 8 BANKS x 8 BIT DDR2 SDRAM

Winbond 

W971GG8JB

3. KEY PARAMETERS

SYM.

SPEED GRADE

Bin(CL-tRCD-tRP)

Part Number Extension

@CL = 7

@CL = 6

tCK(avg) Average clock period

@CL = 5

@CL = 4

@CL = 3

tRCD

tRP

tRC

tRAS

IDD0

IDD1

IDD2Q

IDD4R

IDD4W

IDD5B

IDD6

IDD7

Active to Read/Write Command Delay Time

Precharge to Active Command Period

Active to Ref/Active Command Period

Active to Precharge Command Period

Operating one bank active-precharge current

Operating one bank active-read-precharge current

Precharge quiet standby current

Operating burst read current

Operating burst write current

Burst refresh current

Self refresh current (TCASE ≤ 85°C)

Operating bank interleave read current

Min.

Max.

Min.

Max.

Min.

Max.

Min.

Max.

Min.

Max.

Min.

Min.

Min.

Min.

Max.

Max.

Max.

Max.

Max.

Max.

Max.

Max.

DDR2-1066

6-6-6

-18

1.875 nS

7.5 nS

1.875 nS

7.5 nS

2.5 nS

7.5 nS

3 nS

7.5 nS

−

−

11.25 nS

11.25 nS

51.25 nS

45 nS

75 mA

80 mA

45 mA

125 mA

135 mA

145 mA

10 mA

200 mA

DDR2-800

5-5-5

-25/25I

−

−

2.5 nS

8 nS

2.5 nS

8 nS

3.75 nS

8 nS

5 nS

8 nS

12.5 nS

12.5 nS

52.5 nS

45 nS

70 mA

75 mA

40 mA

105 mA

110 mA

130 mA

10 mA

180 mA

DDR2-667

5-5-5

-3

−

−

−

−

3 nS

8 nS

3.75 nS

8 nS

5 nS

8 nS

15 nS

15 nS

55 nS

45 nS

65 mA

70 mA

35 mA

95 mA

100 mA

120 mA

10 mA

160 mA

Publication Release Date: Aug. 11, 2010

-5-

Revision A01

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