STK14C88-K45M データシートの表示（PDF） - Unspecified
部品番号
コンポーネント説明
メーカー
STK14C88-K45M Datasheet PDF : 12 Pages
| |||
STK14C88-M
HSB OPERATION
The STK14C88-M provides the HSB pin for control-
ling and acknowledging the STORE operations. The
HSB pin can be used to request a hardware STORE
cycle. When the HSB pin is driven low, the
STK14C88-M will conditionally initiate a STORE
operation after tDELAY; an actual STORE cycle will only
begin if a WRITE to the SRAM took place since the
last STORE or RECALL cycle. The HSB pin acts as
an open drain driver that is internally driven low to
indicate a busy condition while the STORE (initiated
by any means) is in progress.
SRAM READ and WRITE operations that are in
progress when HSB is driven low by any means are
given time to complete before the STORE operation
is initiated. After HSB goes low, the STK14C88-M
will continue SRAM operations for tDELAY. During tDELAY,
multiple SRAM READ operations may take place. If a
WRITE is in progress when HSB is pulled low it will
be allowed a time, tDELAY, to complete. However, any
SRAM WRITE cycles requested after HSB goes low
will be inhibited until HSB returns high.
The HSB pin can be used to synchronize multiple
STK14C88-Ms while using a single larger capacitor.
To operate in this mode, the HSB pin should be con-
nected together to the HSB pins from the other
STK14C88-Ms. An external pull-up resistor to + 5V
is required since HSB acts as an open drain pull
down. The VCAP pins from the other STK14C88-M
parts can be tied together and share a single capac-
itor. The capacitor size must be scaled by the num-
ber of devices connected to it. When any one of the
STK14C88-Ms detects a power loss and asserts
HSB, the common HSB pin will cause all parts to
request a STORE cycle (a STORE will take place in
those STK14C88-Ms that have been written since
the last nonvolatile cycle).
During any STORE operation, regardless of how it
was initiated, the STK14C88-M will continue to drive
the HSB pin low, releasing it only when the STORE is
complete. Upon completion of the STORE operation
the STK14C88-M will remain disabled until the HSB
pin returns high.
If HSB is not used, it should be left unconnected.
PREVENTING STORES
The STORE function can be disabled on the fly by
holding HSB high with a driver capable of sourcing
30mA at a VOH of at least 2.2V, as it will have to over-
power the internal pull-down device that drives HSB
low for 20µs at the onset of a STORE. When the
STK14C88-M is connected for AutoStore™ opera-
tion (system VCC connected to VCCX and a 68µF
capacitor on VCAP) and VCC crosses VSWITCH on the
way down, the STK14C88-M will attempt to pull HSB
low; if HSB doesn’t actually get below VIL, the part
will stop trying to pull HSB low and abort the STORE
attempt.
HARDWARE PROTECT
The STK14C88-M offers hardware protection
against inadvertent STORE operation and SRAM
WRITEs during low-voltage conditions. When VCAP <
VSWITCH, all externally initiated STORE operations and
SRAM WRITEs are inhibited.
AutoStore™ can be completely disabled by tying
VCCX to ground and applying + 5V to VCAP. This is the
AutoStore™ Inhibit mode; STOREs are only initiated
by explicit request using either the software
sequence or the HSB pin in this mode.
LOW AVERAGE ACTIVE POWER
The STK14C88-M will draw significantly less current
when it is cycled at times longer than 50ns. Figure 5
shows the relationship between ICC and READ cycle
time. Worst-case current consumption is shown for
both CMOS and TTL input levels (commercial tem-
perature range, VCC = 5.5V, 100% duty cycle on chip
enable). Figure 6 shows the same relationship for
WRITE cycles. If the chip enable duty cycle is less
than 100%, only standby current is drawn when the
chip is disabled.
The overall average current drawn by the
STK14C88-M depends on the following items:
1) CMOS vs. TTL input levels; 2) the duty cycle of
chip enable; 3) the overall cycle rate for accesses;
4) the ratio of READs to WRITEs; 5) the operating
temperature; 6) the VCC level; and 7) I/O loading.
April 1999
5-52
Share Link: 