A81L801
Table 1.2 Device Bus Operations—Flash Word Mode BYTE_F = VIL
Flash Operation
(Notes 1,2)
CE_F CE_S OE
WE
I/O15
(A-1)
Read from Flash
L
H
L
H
A-1
Standby
H
H
X
X
X
Output Disable
L
H
H
H
X
Write to Flash (Program/Erase) L
H
H
L
A-1
A0-A18
AIN
X
X
AIN
RESET I/O7-I/O0 I/O14-I/O8
H
DOUT
High-Z
H
High-Z
High-Z
H
High-Z
High-Z
H
DIN
High-Z
Sector Protect
L
H
VID
L
Sector Address,
VID
X
A6=L, A1=H, A0=L
Sector Unprotect
L
H
L
H
L
Sector Address,
VID
A6=L, A1=H, A0=L
Code
Temporary Sector Unprotection
X
H
X
X
X
AIN
VID
X
Flash Reset (Hardware)/
X
H
X
X
X
X
L
High-Z
Standby
Boot Block Sector Write Protect
X
H
X
X
X
X
X
X
DOUT
DOUT
Read from SRAM
H
L
L
H
DOUT
A0
H
High-Z
High-z
DOUT
DIN
DIN
Write to SRAM
H
L
H
L
DIN
A0
H
High-Z
High-z
DIN
Legend:
L = Logic Low = VIL, H = Logic High = VIH, VID = 11.5-12.5V, = Pulse input, X = Don’t Care, DIN = Data In, DOUT = Data Out
High-Z
High-Z
High-Z
High-Z
High-Z
DOUT
High-Z
DOUT
DIN
High-Z
DIN
Notes:
1. Other operations except for those indicated in this column are inhibited.
2. Do not apply CE_F = VIL, CE_S = VIL at the same time.
PRELIMINARY (March, 2005, Version 0.0)
10
AMIC Technology, Corp.