74LVT2245D データシートの表示（PDF） - NXP Semiconductors.
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74LVT2245D Datasheet PDF : 15 Pages
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Nexperia
74LVT2245; 74LVTH2245
3.3 V octal transceiver with 30 Ω termination resistors; 3-state
5 Pinning information
5.1 Pinning
74LVT2245
75LVTH2245
DIR 1
A0 2
A1 3
A2 4
A3 5
A4 6
A5 7
A6 8
A7 9
GND 10
20 VCC
19 OE
18 B0
17 B1
16 B2
15 B3
14 B4
13 B5
12 B6
11 B7
aaa-026622
Figure 4. Pin configuration for SO20
74LVT2245
74LVTH2245
DIR 1
A0 2
A1 3
A2 4
A3 5
A4 6
A5 7
A6 8
A7 9
GND 10
20 VCC
19 OE
18 B0
17 B1
16 B2
15 B3
14 B4
13 B5
12 B6
11 B7
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Figure 5. Pin configuration for SSOP20 and TSSOP20
5.2 Pin description
Table 2. Pin description
Symbol
DIR
A0, A1, A2, A3, A4, A5, A6, A7
GND
B7, B6, B5, B4, B3, B2, B1, B0
OE
VCC
Pin
1
2, 3, 4, 5, 6, 7, 8, 9
10
11, 12, 13, 14, 15, 16, 17, 18
19
20
6 Functional description
Table 3. Function table [1]
Control
OE
DIR
L
L
L
H
H
X
[1] H = HIGH voltage level;
L = LOW voltage level;
X = don’t care;
Z = high-impedance OFF-state.
Input/output
An
output An = Bn
input
Z
Description
direction control input
data input/output
ground (0 V)
data input/output
output enable input
supply voltage
Bn
input
output Bn = An
Z
74LVT_LVTH2245
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 10 April 2017
© Nexperia B.V. 2017. All rights reserved.
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