Philips Semiconductors
16-bit D-type transparent latch with 5 V
tolerant inputs/outputs; 3-state
Product specification
74LVC16373A;
74LVCH16373A
SYMBOL
PARAMETER
CONDITIONS
WAVEFORMS VCC (V)
MIN.
Tamb = −40 to +125 °C
tPHL/tPLH propagation delay Dn to Qn
see Fig 6 and 10 1.2
−
2.7
1.5
3.0 to 3.6 1.0
propagation delay LE to Qn
see Fig 7 and 10 1.2
−
2.7
1.5
3.0 to 3.6 1.5
tPZH/tPZL 3-state output enable time OE to Qn see Fig 8 and 10 1.2
−
2.7
1.5
3.0 to 3.6 1.0
tPHZ/tPLZ 3-state output disable time OE to Qn see Fig 8 and 10 1.2
−
2.7
1.5
3.0 to 3.6 1.5
tW
LE pulse width HIGH
see Fig 7
1.2
−
2.7
3.0
3.0 to 3.6 3.0
tsu
set-up time Dn to LE
see Fig 9
1.2
−
2.7
2.0
3.0 to 3.6 2.0
th
hold time Dn to LE
see Fig 9
1.2
−
2.7
0.9
3.0 to 3.6 0.9
tsk(0)
skew
note 3
3.0 to 3.6 −
Notes
1. All typical values are measured at Tamb = 25 °C.
2. Measured at VCC = 3.3 V.
3. Skew between any two outputs of the same package switching in the same direction.
This parameter is guaranteed by design.
TYP.
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
MAX. UNIT
−
ns
6.5 ns
5.5 ns
−
ns
7.0 ns
6.0 ns
−
ns
7.5 ns
6.5 ns
−
ns
8.0 ns
7.0 ns
−
ns
−
ns
−
ns
−
ns
−
ns
−
ns
−
ns
−
ns
−
ns
1.5 ns
2003 Dec 08
10