NXP Semiconductors
74LV259
8-bit addressable latch
Table 9. Measurement points
Supply voltage
VCC
< 2.7 V
2.7 V to 3.6 V
Input
VM
0.5VCC
1.5 V
Output
VM
0.5VCC
1.5 V
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Test data is given in Table 10.
Definitions test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
Fig 12. Test circuit for measuring switching times
Table 10. Test data
Supply voltage
VCC
< 2.7 V
2.7 V to 3.6 V
Input
VI
VCC
2.7 V
tr, tf
2.5 ns
2.5 ns
74LV259
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 9 March 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
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