74HC244 データシートの表示（PDF） - ON Semiconductor
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74HC244 Datasheet PDF : 7 Pages
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74HC244
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6 ns)
Guaranteed Limit
Symbol
Parameter
VCC – 55 to
(V)
25_C
v85_C v125_C Unit
tPLH,
tPHL
Maximum Propagation Delay, A to YA or B to YB
(Figures 1 and 3)
2.0
96
3.0
50
4.5
18
6.0
15
115
135
ns
60
70
23
27
20
23
tPLZ,
tPHZ
Maximum Propagation Delay, Output Enable to YA or YB
(Figures 2 and 4)
2.0
110
140
165
ns
3.0
60
70
80
4.5
22
28
33
6.0
19
24
28
tPZL,
tPZH
Maximum Propagation Delay, Output Enable to YA or YB
(Figures 2 and 4)
2.0
110
140
165
ns
3.0
60
70
80
4.5
22
28
33
6.0
19
24
28
tTLH,
tTHL
Maximum Output Transition Time, Any Output
(Figures 1 and 3)
2.0
60
75
90
ns
3.0
23
27
32
4.5
12
15
18
6.0
10
13
15
Cin Maximum Input Capacitance
Cout Maximum Three−State Output Capacitance
(Output in High−Impedance State)
−
10
10
10
pF
−
15
15
15
pF
NOTE: For propagation delays with loads other than 50 pF, and information on typical parametric values, see Chapter 2 of the ON
Semiconductor High−Speed CMOS Data Book (DL129/D).
Typical @ 25°C, VCC = 5.0 V
CPD Power Dissipation Capacitance (Per Buffer)*
34
pF
* Used to determine the no−load dynamic power consumption: PD = CPD VCC2f + ICC VCC. For load considerations, see Chapter 2 of the
ON Semiconductor High−Speed CMOS Data Book (DL129/D).
SWITCHING WAVEFORMS
tr
DATA INPUT
A OR B
tPLH
OUTPUT
YA OR YB
90%
50%
10%
90%
50%
10%
tTLH
tf
VCC
GND
tPHL
tTHL
Figure 1.
ENABLE
A OR B
OUTPUT Y
OUTPUT Y
50%
tPZL
tPLZ
50%
tPZH
tPHZ
50%
Figure 2.
VCC
GND
HIGH
IMPEDANCE
10% VOL
90% VOH
HIGH
IMPEDANCE
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