MB15U10PFV データシートの表示（PDF） - Fujitsu

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MB15U10PFV

Dual Serial Input PLL Frequency Synthesizer On-Chip 1.1 GHz Prescaler

Fujitsu 

MB15U10

s BLOCK DIAGRAM

VDD1

4

18 VP

fin1 6

PS 5

Power sav-

ing circuit

PS1

17-bit latch (comparisonal division)

Main counter

fp1

(binary 17-bit)

PLL1

Phase

comparator

LD1

Charge

pump

CR1

ISET

3 Do1

OSCin 8

OSCout 10

fin2 15

LE 13

Data 12

Clock 11

Crystal

oscillator

fr1

Reference counter

fr2

+1/+2

SR

TS

14-bit latch (referencial division)

Power sav-

ing circuit

PS2

17-bit latch (comparisonal division)

P0

LD2

Selector

OLA, B

fr2

Selector

fp1

fp2

Main counter

(binary 17-bit)

fp2

Phase

comparator

PLL2

P0

P1, 2, 3

10-bit latch

OLA, B

CR1, 2

Latch selector

Charge

pump

CR2

Shift register (21-bit)

14

VDD2

7

DGND

16

AGND

19 P0/LD

9 P3/fr2

1 P1/fp1

2 P2/fp2

17 Do2

20 ISET

4

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