ENC424J600-I/ML データシートの表示（PDF） - Microchip Technology
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ENC424J600-I/ML
Microchip Technology
ENC424J600-I/ML Datasheet PDF : 168 Pages
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ENC424J600/624J600
Registers
ECON1 (Ethernet Control 1) ....................................... 90
ECON2 (Ethernet Control 2) ....................................... 77
EIDLED (Ethernet ID Status/LED Control).................. 79
EIE (Ethernet Interrupt Enable)................................. 120
EIR (Ethernet Interrupt Flag)..................................... 118
ERXFCON (Ethernet RX Filter Control)...................... 96
ERXWM (Receive Watermark) ................................. 106
ESTAT (Ethernet Status) ............................................ 93
ETXSTAT (Ethernet Transmit Status)......................... 92
MABBIPG (MAC Back-to-Back
Inter-Packet Gap) ............................................... 81
MACLCON (MAC Collision Control) ........................... 82
MACON1 (MAC Control 1)........................................ 107
MACON2 (MAC Control 2).......................................... 80
MAIPG (MAC Inter-Packet Gap)................................. 82
MICMD (MII Management Command)........................ 30
MIREGADR (MII Management Address) .................... 29
MISTAT (MII Management Status) ............................. 30
PHANA (PHY Auto-Negotiation
Advertisement).................................................. 113
PHANE (PHY Auto-Negotiation Expansion) ............. 115
PHANLPA (PHY Auto-Negotiation Link
Partner Ability) .................................................. 114
PHCON1 (PHY Control 1)......................................... 110
PHCON2 (PHY Control 2)......................................... 139
PHSTAT1 (PHY Status 1)......................................... 111
PHSTAT2 (PHY Status 2)......................................... 112
PHSTAT3 (PHY Status 3)......................................... 112
Reset
PHY Subsystem.......................................................... 74
Power-on..................................................................... 73
Receive Only............................................................... 74
System ........................................................................ 73
Transmit Only.............................................................. 74
Revision History ................................................................ 157
S
Serial Peripheral Interface (SPI)
External Connections.................................................. 14
Instruction Set ............................................................. 39
Physical Implementation ............................................. 39
SFR. See Special Function Registers................................. 19
SHA-1 Hashing ................................................................. 126
Single Byte Instructions ...................................................... 41
Source Address .................................................................. 72
Special Function Registers ................................................. 19
Address Map
16-Bit PSP .......................................................... 22
8-Bit PSP ............................................................ 21
SPI ...................................................................... 20
PHY Registers ............................................................ 28
Speed/Duplex Auto-Negotiation........................................ 109
Manual Configuration................................................ 109
SPI Instruction Set
N-Byte Instructions
Banked SFR ....................................................... 45
SRAM Buffer ....................................................... 49
Unbanked SFR ................................................... 47
Single Byte Instructions .............................................. 41
Summary Table........................................................... 40
Three-Byte Instructions............................................... 43
Two-Byte Instructions ................................................. 42
SRAM Buffer....................................................................... 32
Buffer Pointers............................................................ 34
Circular Wrapping
ERXDATA Pointer .............................................. 36
EUDADATA Pointer...................................... 36–37
Circular Wrapping with EGPDATA Pointer ................. 35
Direct Access.............................................................. 33
General Purpose Buffer.............................................. 33
Indirect Access ........................................................... 34
Receive Buffer ............................................................ 33
Transmit Buffer ........................................................... 33
Start-Of-Frame Delimiter .................................................... 71
Start-of-Stream/Preamble Field .......................................... 71
System Reset ..................................................................... 73
T
Three-Byte Instructions....................................................... 43
Timing Diagrams
N-Byte SPI Instruction
(Banked SFR Operations) .................................. 45
N-Byte SPI Opcode
(Unbanked SFR Operations) .............................. 47
N-Byte SPI Opcode Instruction
(SRAM Buffer Operations).................................. 49
PSP Mode 1 Read...................................................... 54
PSP Mode 1 Write ...................................................... 54
PSP Mode 10 Read.................................................... 70
PSP Mode 10 Write .................................................... 70
PSP Mode 2 Read...................................................... 56
PSP Mode 2 Write ...................................................... 56
PSP Mode 3 Read...................................................... 58
PSP Mode 3 Write ...................................................... 58
PSP Mode 4 Read...................................................... 60
PSP Mode 4 Write ...................................................... 60
PSP Mode 5 Read...................................................... 63
PSP Mode 5 Write ...................................................... 63
PSP Mode 6 Read...................................................... 66
PSP Mode 6 Write ...................................................... 66
PSP Mode 9 Read...................................................... 68
PSP Mode 9 Write ...................................................... 68
Single Byte Instruction................................................ 41
SPI Input................................................................... 146
SPI Output ................................................................ 146
Three-Byte Read Instruction....................................... 43
Three-Byte Write Instruction....................................... 43
Two-Byte Instruction (RBSEL Opcode) ...................... 42
Transmit Only Reset ........................................................... 74
Transmitting Packets .................................................... 83–86
Selecting ETXLEN Values (example) ......................... 84
Special Cases............................................................. 85
Transmission Status ................................................... 85
Two-Byte Instructions ......................................................... 42
Type/Length Field ............................................................... 72
W
Wake-on-LAN/Remote Wake-up ...................................... 122
WWW Address ................................................................. 162
WWW, On-Line Support ....................................................... 4
© 2009 Microchip Technology Inc.
DS39935B-page 161
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