74ACT74CW データシートの表示（PDF） - Fairchild Semiconductor

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74ACT74CW

Dual D-Type Positive Edge-Triggered Flip-Flop

Fairchild Semiconductor 

Logic Symbols

IEEE/IEC

Truth Table

(Each Half)

Inputs

Outputs

SD CD CP D

Q

Q

L

H

XXH

L

H

L

XXL

H

L

L

XXH

H

H

 H

HH

L

H

 H

L

L

H

H

H

L

X Q0 Q0

H = HIGH Voltage Level

L = LOW Voltage Level

X = Immaterial

= LOW-to-HIGH Clock Transition

Q0 (Q0) = Previous Q (Q) before LOW-to-HIGH Transition of Clock

Logic Diagram

Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.

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