MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Dual 4-Input Data Selector/
Multiplexer with
3-State Outputs
High–Performance Silicon–Gate CMOS
The MC74HC253 is identical in pinout to the LS253. The device inputs are
compatible with standard CMOS outputs; with pullup resistors, they are
compatible with LSTTL outputs.
The Address inputs select one of four Data inputs from each multiplexer.
Each multiplexer has an active–low Output Enable control and a three–state
noninverting output.
The HC253 is similar in function to the HC153 which does not have
three–state outputs.
• Output Drive Capability: 10 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2 to 6 V
• Low Input Current: 1 µA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance with the Requirements Defined by JEDEC Standard
No 7A
• Chip Complexity 108 FETs or 27 Equivalent Gates
LOGIC DIAGRAM
ADDRESS
INPUTS
A0 14
A1 2
DATA–
WORD a
INPUTS
D0a 6
D1a 5
D2a 4
D3a 3
OUTPUT 1
ENABLE a
7 Ya
DATA–
WORD b
INPUTS
D0b 10
D1b 11
D2b 12
D3b 13
OUTPUT 15
ENABLE b
PIN 16 = VCC
PIN 8 = GND
9 Yb
MC74HC253
16
1
N SUFFIX
PLASTIC PACKAGE
CASE 648–08
16
1
D SUFFIX
SOIC PACKAGE
CASE 751B–05
ORDERING INFORMATION
MC74HCXXXN
MC74HCXXXD
Plastic
SOIC
PIN ASSIGNMENT
OUTPUT
ENABLE a
1
A1 2
16 VCC
15
OUTPUT
ENABLE b
D3a 3
14 A0
D2a 4
13 D3b
D1a 5
12 D2b
D0a 6
Ya 7
11 D1b
10 D0b
GND 8
9 Yb
FUNCTION TABLE
Inputs
Output
A1 A0
X
X
L
L
L
H
H
L
H
H
Output
Enable
Y
H
Z
L
D0
L
D1
L
D2
L
D3
D0, D1, D2, and D3 = the level of
the respective Data Inputs.
Z = high impedance
10/95
© Motorola, Inc. 1995
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