STM6503LEAADG6F データシートの表示（PDF） - STMicroelectronics

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STM6503LEAADG6F

Dual push-button Smart Reset™ with user-adjustable setup delays

STMicroelectronics 

STM6502, STM6503, STM6504, STM6505

7

Package marking

Package marking

Table 13. Package marking

Part number

tSRC

Smart

delay Reset

control inputs(1)

VRST

RST

output(1)

tREC

BLD

option output(1)

Topmark

STM6503REAADG6F TSR

AL

R

AL, OD

A

—

STM6503SEAADG6F TSR

AL

S

AL, OD

A

—

STM6503VEAADG6F TSR

AL

V

AL, OD

A

—

STM6504SEABDG6F(2) TSR

AL

S

AL, OD

B

—

STM6505SCABDG6F CSRC AL, PU

S

AL, OD

B

AL, OD

STM6505RCABDG6F CSRC AL, PU

R

AL, OD

B

AL, OD

STM6505WCABDG6F CSRC AL, PU

W

AL, OD

B

AL, OD

1. AL = active-low, AH = active-high, PU = with internal pull-up resistor, OD = open-drain.

2. Contact local ST sales office for availability.

3RG

3SG

3VG

4SG

5SK

5RK

5WK

Figure 21. Package marking, top view

A

B

C

D

E

Topmark

A = dot (pin 1 reference)

B = assembly plant (P)

C = assembly year (Y, 0-9): 9 = 2009 etc.

D = assembly work week (WW, 01 to 52): 20 = WW20 etc.

E = marking area (topmark)

AM00479

Doc ID 16101 Rev 6

27/29

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