WM8774IFT/V データシートの表示（PDF） - Wolfson Microelectronics plc
部品番号
コンポーネント説明
メーカー
WM8774IFT/V Datasheet PDF : 42 Pages
| |||
WM8774
MASTER CLOCK TIMING
MCLK
tMCLKL
tMCLKH
tMCLKY
Product Preview
Figure 1 Master Clock Timing Requirements
Test Conditions
AVDD = 5V, DVDD = 3.3V, AGND = 0V, AGND, DGND = 0V, TA = +25oC, fs = 48kHz, MCLK = 256fs unless otherwise stated.
PARAMETER
SYMBOL
System Clock Timing Information
MCLK System clock pulse width high
tMCLKH
MCLK System clock pulse width low
tMCLKL
MCLK System clock cycle time
tMCLKY
MCLK Duty cycle
TEST CONDITIONS
MIN
11
11
28
40:60
TYP
MAX
UNIT
ns
ns
ns
60:40
Table 1 Master Clock Timing Requirements
DIGITAL AUDIO INTERFACE – MASTER MODE
BCLK
ADCLRC
WM8774
CODEC DACLRC
DOUT
DIN
DVD
Controller
Figure 2 Audio Interface - Master Mode
PP Rev 1.0 June 2002
8
Share Link: 