W9864G6JH-7 データシートの表示（PDF） - Winbond

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W9864G6JH-7

1M x 4 BANKS x 16 BITS SDRAM

Winbond 

W9864G6JH

10.4 Mode Register Set Cycle

tRSC

CLK

CS

tCMS tCMH

RAS

CAS

WE

A0-A11

BS0,1

tCMS tCMH

tCMS tCMH

tCMS tCMH

tAS

tAH

Register

set data

A0

A1

Burst Length

A2

A3

Addressing Mode

A4

A5

CAS Latency

A6

A07 "0"

(Test Mode)

A8 "0"

Reserved

A9

WriteAM0 ode

A10 "0"

AA101 "0"

BS0 "0"

BS1 "0"

Reserved

* "Reserved" should stay "0" during MRS cycle.

next

command

A2 AA10 A0

0 A00 0

0 A00 1

0 A10 0

0 A10 1

1 A00 0

1 A00 1

1 A10 0

1 A10 1

A03

0

1

A6 AA50 A4

0 A00 0

0 A00 1

0 A10 0

0 A10 1

1 A00 0

A09

0

1

Burst Length

Sequential

Interleave

1

1

2

2

4

4

8

8

Reserved

Full Page

Reserved

Addressing Mode

Sequential

Interleave

CAS Latency

Reserved

Reserved

2

3

Reserved

Single Write Mode

Burst read and Burst write

Burst read and single write

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Publication Release Date: Jun. 25, 2013

Revision A04

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