AD7880 データシートの表示（PDF） - Analog Devices
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AD7880 Datasheet PDF : 16 Pages
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AD7880
ORDERING GUIDE
Model
Temperature
Range
Full-Scale
Error
(LSBs)
Bipolar
Zero
Error
(LSBs)
Package
Option*
AD7880BN –40°C to +85°C ± 15
AD7880BQ –40°C to +85°C ± 15
AD7880CN –40°C to +85°C ± 5
AD7880CQ –40°C to +85°C ± 5
AD7880BR –40°C to +85°C ± 15
AD7880CR –40°C to +85°C ± 5
± 10
N-24
± 10
Q-24
±5
N-24
±5
Q-24
± 10
R-24
±5
R-24
*N = Plastic DIP; Q = Cerdip; R = SOIC (Small Outline Integrated Circuit).
PIN CONFIGURATION
VINA 1
VINB 2
AGND 3
VREF 4
CS 5
CONVST 6
RD 7
BUSY 8
CLKIN 9
DGND 10
DB0 11
DB1 12
AD7880
TOP VIEW
(Not to Scale)
24 VDD
23 MODE
22 DB11
21 DB10
20 DB9
19 DB8
18 DB7
17 DB6
16 DB5
15 DB4
14 DB3
13 DB2
Pin
No.
1
2
3
4
5
6
7
8
9
10
11 . . . 22
23
24
PIN FUNCTION DESCRIPTION
Pin
Mnemonic Function
VINA
VINB
AGND
Analog Input.
Analog Input.
Analog Ground.
VREF
CS
Voltage Reference Input. This is normally tied to VDD.
Chip Select. Active Low Logic input. The device is selected when this input is active.
CONVST Convert Start. A low to high transition on this input puts the track/hold into hold mode and starts con-
version. This input is asynchronous to the CLKIN and is independent of CS and RD.
RD
Read. Active Low Logic Input. This input is used in conjunction with CS low to enable data outputs.
BUSY
Active Low Logic Output. This status line indicates converter status. BUSY is low during conversion.
CLKIN
Clock Input. TTL-compatible logic input. Used as the clock source for the A/D converter. The mark/
space ratio of the clock can vary from 40/60 to 60/40.
DGND Digital Ground.
DB0–DB11 Three-State Data Outputs. These become active when CS and RD are brought low.
MODE
VDD
MODE Input. This input is used to put the device into the power save mode (MODE = 0 V). During
normal operation, the MODE input will be a logic high (MODE = VDD).
Power Supply. This is nominally +5 V.
–4–
REV. 0
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