AD7880 データシートの表示（PDF） - Analog Devices
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AD7880 Datasheet PDF : 16 Pages
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AD7880
TIMING CHARACTERISTICS1 (VDD = +5 V ؎ 5%, VREF = VDD, AGND = DGND = 0 V)
Parameter
Limit at +25؇C
(All Versions)
Limit at TMIN, TMAX
(All Versions)
Units
Conditions/Comments
t1
50
50
t2
130
130
t3
0
0
t4
0
0
t5
0
0
t6
60
75
t72
57
70
t83
5
5
50
50
ns min
ns min
ns min
ns min
ns min
ns min
ns max
ns min
ns max
CONVST Pulse Width
CONVST to BUSY Falling Edge
BUSY to CS Setup Time
CS to RD Setup Time
CS to RD Hold Time
RD Pulse Width
Data Access Time after RD
Bus Relinquish Time after RD
NOTES
1Timing specifications in bold print are 100% production tested. All other times are sample tested at +25°C to ensure compliance. All input signals are specified with
tr = tf = 5 ns (10% to 90% of 5 V) and timed from a voltage level of 1.6 V.
2t7 is measured with the load circuit of Figure 2 and defined as the time required for an output to cross 0.8 V or 2.4 V.
3t8 is derived from the measured time taken by the data outputs to change by 0.5 V when loaded with the circuit of Figure 2. The measured number is then extrapo-
lated back to remove the effects of charging the 50 pF capacitor. This means that the time, t 8, quoted in the timing characteristics is the true bus relinquish time of
the part and as such is independent of external bus loading capacitances.
CONVST
BUSY
CS
RD
DB0 – DB11
t1
t2
TRACK/HOLD
GOES INTO HOLD
t CONVERT
t3
THREE-STATE
t4
t5
t6
t7
t8
DATA
VALID
Figure 1. Timing Diagram
1.6mA
TO OUTPUT
PIN
50pF
+ 2.1V
200µA
Figure 2. Load Circuit for Access and Relinquish Time
Table I. Truth Table
CS
CONVST
RD
Function
1
1
1
j
0
1
0
1
X
Not Selected
1
Start Conversion g
0
Enable ADC Data
1
Data Bus Three Stated
ABSOLUTE MAXIMUM RATINGS*
VDD to AGND . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
VDD to DGND . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
AGND to DGND . . . . . . . . . . . . . . . . . –0.3 V to VDD + 0.3 V
VINA, VINB to AGND (Figure 5) . . . . . . –0.3 V to VDD + 0.3 V
VINA to AGND (Figure 6) . . . . . . . . . –0.6 V to 2 VDD + 0.6 V
VINA to AGND (Figure 7) . . . . . –VDD – 0.3 V to VDD + 0.3 V
VREF to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to VDD
Digital Inputs to DGND . . . . . . . . . . . –0.3 V to VDD + 0.3 V
Digital Outputs to DGND . . . . . . . . . . –0.3 V to VDD + 0.3 V
Operating Temperature Range
Industrial (B, C Versions) . . . . . . . . . . . . . –40°C to +85°C
Storage Temperature Range . . . . . . . . . . . –65°C to +150°C
Lead Temperature (Soldering, 10 secs) . . . . . . . . . . . . +300°C
Power Dissipation (Any Package) to +75°C . . . . . . . . 450 mW
Derates above +75°C by . . . . . . . . . . . . . . . . . . . . . 10 mW/°C
*Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those listed in the
operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD7880 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
REV. 0
–3–
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