TLE 4271-2
Circuit Description
The control amplifier compares a reference voltage, which is kept highly accurate by
resistance adjustment, to a voltage that is proportional to the output voltage and drives
the base of a series transistor via a buffer. Saturation control as a function of the load
current prevents any over-saturation of the power element.
The reset output RO is in high-state if the voltage on the delay capacitor CD is greater or
equal VUD. The delay capacitor CD is charged with the current ID for output voltages
greater than the reset threshold VRT. If the output voltage gets lower than VRT (’reset
condition’) a fast discharge of the delay capacitor CD sets in and as soon as VD gets lower
than VLD the reset output RO is set to low-level.
The time for the delay capacitor charge from VUD to VLD is the reset delay time tD.
When the voltage on the delay capacitor has reached VUD and reset was set to high, the
watchdog circuit is enabled and discharges CD with the constant current IDWD. If there is
no rising edge observed at the watchdog input, CD will be discharge down to VLDW, then
reset output RO will be set to low and CD will be charged again with the current IDWC until
VD reaches VUD and reset will be set high again.
If the watchdog pulse (rising edge at watchdog input WI) occurs during the discharge
period CD is charged again and the reset output stays high. After VD has reached VUD,
the periodical behavior starts again.
Internal protection circuits protect the IC against:
• Overload
• Overvoltage
• Overtemperature
• Reverse polarity
Data Sheet Rev. 2.4
3
2001-04-04