T83C5102XXX-TIRCL(2003) データシートの表示（PDF） - Atmel Corporation

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T83C5102XXX-TIRCL
(Rev.:2003)

8-bit Low Pin Count Microcontrollers

Atmel Corporation 

Table 10. PCON Register

PCON - Power Control Register (87h)

7

6

5

4

3

2

1

0

SMOD1 SMOD0

-

POF

GF1

GF0

PD

IDL

Bit

Number

Bit

Mnemonic Description

7

SMOD1

Serial port Mode bit 1

Set to select double baud rate in mode 1, 2 or 3.

Serial port Mode bit 0

6

SMOD0 Clear to select SM0 bit in SCON register.

Set to to select FE bit in SCON register.

5

-

Reserved

The value read from this bit is indeterminate. Do not set this bit.

Power-Off Flag

4

POF

Clear to recognize next reset type.

Set by hardware when VCC rises from 0 to its nominal voltage. Can also be

set by software.

General purpose Flag

3

GF1

Cleared by user for general purpose usage.

Set by user for general purpose usage.

General purpose Flag

2

GF0

Cleared by user for general purpose usage.

Set by user for general purpose usage.

Power-Down mode bit

1

PD

Cleared by hardware when reset occurs.

Set to enter power-down mode.

Idle mode bit

0

IDL

Clear by hardware when interrupt or reset occurs.

Set to enter idle mode.

Reset Value = 00X1 0000b

Not bit addressable

Power-off flag reset value will be 1 only after a power on (cold reset). A warm reset

doesn’t affect the value of this bit.

24 T8xC5101/02

4233G–8051–03/03

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