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DS2405Z(1999) データシートの表示(PDF) - Dallas Semiconductor -> Maxim Integrated

部品番号
コンポーネント説明
メーカー
DS2405Z
(Rev.:1999)
Dallas
Dallas Semiconductor -> Maxim Integrated 
DS2405Z Datasheet PDF : 15 Pages
First Prev 11 12 13 14 15
NOTES:
1. All voltages are referenced to ground.
DS2405
2. VPUP = external pullup voltage.
3. Input load is to ground.
4. An additional reset or communication sequence cannot begin until the reset high time has expired.
5. Read data setup time refers to the time the host must pull the 1-Wire bus low to read a bit. Data is
guaranteed to be valid within 1 µs of this falling edge and will remain valid for 14 µs minimum (15
µs total from falling edge on 1-Wire bus).
6. VIH is a function of the external pullup resistor and the VCC supply.
7. Capacitance on the data pin could be 800 pF when power is first applied. If a 5 kresistor is used to
pullup the data line to VCC, 5 µs after power has been applied the parasite capacitance will not affect
normal communications.
8. VIH for PIO pin should always be greater than or equal to VPUP -0.3 volts.
9. Input resistance is to ground.
10. Under certain low voltage conditions VILMAX may have to be reduced to as much as 0.5V to always
guarantee a Presence Pulse.
15 of 15
102299

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