DM74AS286M データシートの表示（PDF） - Fairchild Semiconductor
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DM74AS286M Datasheet PDF : 7 Pages
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Switching Characteristics
over recommended supply and temperature range
Symbol
Parameter
tPLH
Propagation Delay Time
from LOW-to-HIGH Level Output
tPHL
Propagation Delay Time
from HIGH-to-LOW Level Output
tPLH
Propagation Delay Time
from LOW-to-HIGH Level Output
tPHL
Propagation Delay Time
from HIGH-to-LOW Level Output
tPLH
Propagation Delay Time
from LOW-to-HIGH Level Output
tPHL
Propagation Delay Time
from HIGH-to-LOW Level Output
tPZL
Output Enable Time to LOW Level
tPLZ
Output Disable Time from LOW Level
tPZH
Output Disable Time from HIGH Level
tPHZ
Output Enable Time to HIGH Level
Typical Applications
From
To
Min
Any Data Input Parity I/O
3
Any Data Input Parity I/O
3
Any Data Input Parity Error
3
Any Data Input Parity Error
3
Parity I/O
Parity Error
3
Parity I/O
Parity Error
3
XMIT
Parity I/O
3
XMIT
Parity I/O
3
XMIT
Parity I/O
3
XMIT
Parity I/O
3
Max
Units
15
ns
14
ns
16.5
ns
16.5
ns
9
ns
9
ns
16
ns
10
ns
13
ns
11.5
ns
Number of
Inputs that
are Logic “1”
0, 2, 4, 6, 8, 10
Even
1, 3, 5, 7, 9
Odd
Parity
Result
Output
L
H
FIGURE 1. Dedicated 10-Bit Parity Sensing Configuration
3
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