S1D13700 データシートの表示（PDF） - Seiko Epson Corp

部品番号

コンポーネント説明

メーカー

S1D13700

Embedded Memory Graphics LCD Controller

Seiko Epson Corp 

Epson Research and Development

Vancouver Design Center

Page 131

• REG[18h] bits 3-2, split these bits into individual display mode bits for screen block 3

and 1

• REG[1Bh], changed wording of Horizontal Pixel Scroll bit description

• REG[1Ch]-[1Dh], updated the bit description for the CSRW bits

• REG[1Eh]-[1Fh], updated bit description

• section 11, changed number of bytes for DISP ON/OFF from 2 to 1

• section 11, changed Parameter Read from 101 to 110 and Parameter Write from 010 to

001

• section 11.1.1, moved fOSC formulas to section 15.1.1

• section 11.1.3, updated display on parameters and added display off parameters

• section 11.1.3, fixed display on/off parameters, display off is 01011000 and display on

is 01011001

• section 11.1.6, updated cursor direction parameters

• section 11.1.9, updated Hdot Scr parameters

• section 12.2.1, added “...in 1 bpp.”

• section 12.2.2, expanded note under figure 12-5 to describe all color depths

• figure 12-6, changed line notation between upper and lower panel to be clearer

• section 15.1.1, changed TC/R restriction to TC/R >= C/R + 2 instead of C/R + 4

• table 15-1, updated TC/R values in table and fosc values

• table 15-2, for P5 = 49h changed fOSC from 6.0MHz to 6.5MHz

• section 15.1.3, updated register setup procedure table

• section 15.1.4, updated register setup procedure table

• section 15.1.5, updated register setup procedure table

• figure 15-5 and 15-6, changed FPFRAMEIS to YDIS

• section 15.3, removed “system Interconnection” section as redundant

• section 15.4, removed the MX1=1, MX0=1 options from the diagram

Hardware Functional Specification

Issue Date: 2004/01/06

Revision 1.0

S1D13700

X42A-A-001-00

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