ST63156 データシートの表示（PDF） - STMicroelectronics
部品番号
コンポーネント説明
メーカー
ST63156 Datasheet PDF : 86 Pages
| |||
ST63140,142,126,156
ST631xx CORE
The Core of the ST631xx Family is implemented
independently from the I/O or memory configura-
tion. Consequently, it can be treated as an inde-
pendent central processor communicating with I/O
and memory via internal addresses, data, and con-
trol busses. The in-core communication is ar-
ranged as shown in the following block diagram
figure; the controller being externally linked to both
the reset and the oscillator, while the core is linked
to the dedicated on-chip macrocells peripherals via
the serial data bus and indirectly for interrupt pur-
poses through the control registers.
Registers
The ST631xx Family Core has six registers and
three pairs of flags available to the programmer.
They are shown in Figure 5 and are explained in
the following paragraphs together with the pro-
gram and data memory page registers.
Accumulator (A). The accumulator is an 8-bit
general purpose register used in all arithmetic cal-
culations, logical operations, and data manipula-
tions. The accumulator is addressed in the data
space as RAM location at address FFh .
Accordingly, the ST631xx instruction set can use
the accumulator as any other register of the data
space.
Figure 5. ST631xx Core Programming Model
INDEX
REGISTER
b7 X REG. POINTER b0
SHORT
b7 Y REG. POINTER b0 DIRECT
ADDRESSING
b7
V REGISTER
b0
MODE
b7 W REGISTER
b0
b7 ACCUMULATOR b0
b11
PROGRAM COUNTER
b0
SIX LEVELS
STACK REGISTER
NORMAL FLAGS
INTERRUPT FLAGS
NMI FLAGS
CZ
CZ
CZ
VA000423
Figure 4. ST631xx Core Block Diagram
RESET
0,0 1 TO 8MHz
OS Cin
OSCout
PROGRAM
ROM / EPROM
12
OPCODE
CONT ROL L ER
F LAG
VALUES
2
CONTROL
SIGNALS
I NT ERRUPTS
DATA SPACE
ADDRESS / READ LINE
DATA
RAM / EEPROM
Program Counter
and
6 LAYER STACK
A-DATA
B- DATA
FLAGS
ALU
ADDRESS
DECODER
256
DATA
ROM / EPROM
DEDICATIONS
ACCUMUL ATOR
RESULTS TO DATA SPACE ( WRITE LINE )
VR001811
7/82
®
Share Link: 