AD8307
SPECIFICATIONS
VS = 5 V, TA = 25°C, RL ≥ 1 MΩ, unless otherwise noted.
Table 1.
Parameter
GENERAL CHARACTERISTICS
Input Range (±3 dB Error)
Input Range (±1 dB Error)
Logarithmic Conformance
Logarithmic Slope
vs. Temperature
Logarithmic Intercept
vs. Temperature
Input Noise Spectral Density
Operating Noise Floor
Output Resistance
Internal Load Capacitance
Response Time
Upper Usable Frequency3
Lower Usable Frequency
AMPLIFIER CELL CHARACTERISTICS
Cell Bandwidth
Cell Gain
INPUT CHARACTERISTICS
DC Common-Mode Voltage
Common-Mode Range
DC Input Offset Voltage4
Incremental Input Resistance
Input Capacitance
Bias Current
POWER INTERFACES
Supply Voltage
Supply Current
Disabled
Conditions
From noise floor to maximum input
From noise floor to maximum input
f ≤ 100 MHz, central 80 dB
f = 500 MHz, central 75 dB
Unadjusted1
Sine amplitude, unadjusted2
Equivalent sine power in 50 Ω
Inputs shorted
RSOURCE = 50 Ω/2
Pin 4 to ground
Small signal, 10% to 90%,
0 mV to100 mV, CL = 2 pF
Large signal, 10% to 90%,
0 V to 2.4 V, CL = 2 pF
AC-coupled input
−3 dB
AC-coupled input
Either input (small signal)
RSOURCE ≤ 50 Ω
Drift
Differential
Either pin to ground
Either input
VENB ≥ 2 V
VENB ≤ 1 V
Min Typ
92
88
±0.3
±0.5
23
25
23
20
−87 −84
−88
1.5
−78
10
12.5
3.5
400
500
500
10
900
14.3
3.2
−0.3 1.6
50
0.8
1.1
1.4
10
2.7
8
150
Max
±1
27
27
−77
−76
15
VS − 1
500
25
5.5
10
750
1 This can be adjusted downward by adding a shunt resistor from the output to ground. A 50 kΩ resistor reduces the nominal slope to 20 mV/dB.
2 This can be adjusted in either direction by a voltage applied to Pin 5, with a scale factor of 8 dB/V.
3 See the Operation Above 500 MHz section.
4 Normally nulled automatically by internal offset correction loop. May be manually nulled by a voltage applied between Pin 3 and ground; see the
Applications Information section.
Unit
dB
dB
dB
dB
mV/dB
mV/dB
μV
dBm
dBm
nV/√Hz
dBm
kΩ
pF
ns
ns
MHz
Hz
MHz
dB
V
V
μV
μV/°C
kΩ
pF
μA
V
mA
μA
Rev. C | Page 3 of 24