G-LINK
GLT4160L04
4M X 4 CMOS DYNAMIC RAM WITH EXTENDED DATA OUTPUT
Nov 2001 (Rev.3.2)
TEST MODE CYCLE
Parameter
Random read or write cycle time
Read-modify-write cycle time
Access time from RAS
Access time from CAS
Access time from column address
RAS pulse width
CAS pulse width
RAS hold time
CAS hold time
Column address to RAS lead time
CAS to WE delay time
RAS to WE delay time
Column address to WE delay time
CAS Precharge to WE delay time
EDO Page Mode cycle time
EDO page mode read-modify-write cycle time
RAS Pulse width (EDO page cycle)
Access time form CAS precharge
OE access time
OE to data delay
OE command hold time
Write command set-up time (Test mode in)
Write command hold time (Test mode in)
40
50
60
70
Symbol Min. Max. Min. Max. Min. Max. Min. Max. Unit Notes
tRC
89
89
109
129
tRWC 121
121
145
175
tRAC
55
55
65
75
ns
ns
ns 1,2,3,7
tCAC
18
18
20
25 ns 1,3,7
tAA
30
30
35
40 ns 1,2,7
tRAS 55 10k 55 10k 65 10k 75 10k ns
tCAS 13 10k 13 10k 15 10k 20 10k ns
tRSH 18
18
20
25
ns
tCSH 43
43
50
55
ns
tRAL 30
30
35
40
ns
tCWD 35
35
39
49
ns
8
tRWD 72
72
84
99
ns
8
tAWD 47
47
54
64
ns
8
tCPWD 52
52
59
69
ns
8
tPC
tPRWC
tRASP
25
25
30
35
ns
53
53
61
76
ns
55 100k 55 100k 65 100k 75 100k ns
tCPA
33
33
40
45 ns
1
tOEA
18
18
20
25 ns
tOED 18
18
20
25
ns
tOEH 18
18
20
25
ns
tWTS 10
10
10
10
ns
tWTH 10
10
10
10
ns
G-Link Technology
2701 Northwestern Parkway
Santa Clara, CA 95051, U.S.A.
-9-
G-Link Technology Corporation,Taiwan
6F, No. 24-2, Industry E. RD, IV, Science Based
Industrial Park, Hsin Chu, Taiwan.