MH4V6445BXJJ データシートの表示（PDF） - MITSUBISHI ELECTRIC
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MH4V6445BXJJ Datasheet PDF : 26 Pages
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Preliminary
Some of contents are subject
to change without notice.
MITSUBISHI LSIs
MH4V6445BXJJ-5,-6,-5S,-6S
HYPER PAGE MODE 268435456-BIT (4194304-WORD BY 64-BIT)DYNAMIC RAM
SWITCHING CHARACTERISTICS (Ta=0~70°C, Vcc=3.3V±0.3V, Vss=0V, unless otherwise noted , see notes 6,14,15)
Symbol
Parameter
Limits
-5,-5S
-6,-6S
U-7n,it-7S
Unit
Min Max Min Max Min Max
tCAC Access time from /CAS
(Note 7,8)
13
15
ns 20
ns
tRAC Access time from /RAS
(Note 7,9)
50
60
ns 70
ns
tAA
Column address access time
(Note 7,10)
25
30
ns 35
ns
tCPA Access time from /CAS precharge
(Note 7,11)
28
33
ns 40
ns
tOEA Access time from /OE
(Note 7)
13
15
ns 20
ns
tOHC Output hold time /CAS high
5
5
5ns
ns
tOHR Output hold time /RAS high
(Note 13) 5
5
5ns
ns
tCLZ Output low impedance time from /CAS low (Note 7) 5
5
5ns
ns
tOEZ Output disable time after /OE high
(Note 12)
13
15
ns 20
ns
tWEZ Output disable time after /WE high
(Note 12)
13
15
ns 20
ns
tOFF Output disable time after /CAS high (Note 12,13)
13
15
ns 20
ns
tREZ Output disable time after /RAS high (Note 12,13)
13
15
ns 20
ns
tDOH Output hold time from /CAS low
5
5
5ns
ns
Note 6: An initial pause of 500us is required after power-up followed by a minimum of eight initialization cycles (any combination of cycles
containing a /RAS clock such as /RAS-Only refresh).
Note the /RAS may be cycled during the initial pause . And any 8 /RAS or /RAS /CAS cycles are required after prolonged periods
(greater than 64 ms) of /RAS inactivity before proper device operation is achieved.
7: Measured with a load circuit equivalent to 100pF. The reference levels for measuring of output signals are 2.0(VOH)and 0.8(VOL).
8: Assumes that tRCD≥tRCD(max), tASC≥tASC(max) and tCP≥tCP(max).
9: Assumes that tRCD≤tRCD(max) and tRAD≤tRAD(max). If tRCD or tRAD is greater than the maximum recommended value shown in
this table,tRAC will increase by amount that tRCD exceeds the value shown.
10: Assumes that tRAD≥tRAD(max) and tASC≤tASC(max).
11: Assumes that tCP≤tCP(max) and tASC≥tASC(max).
12: tOEZ (max), tWEZ(max), tOFF(max) and tREZ(max) defines the time at which the output achieves the high impedance state
(IOUT≤ ±10uA) and is not reference to VOH(min) or VOL(max).
13: Output is disable after both /RAS and /CAS go to high
TIMING REQUIREMENTS (For Read, Write, Read-Modify-Write ,Refresh, and Hyper-Page Mode Cycles)
(Ta=0~70°C, Vcc=3.3V±0.3V, Vss=0V, unless otherwise noted ,see notes 14,15)
Limits
Symbol
Parameter
-5,-5S
-6,-6S
Unit
Min Max Min Max
tREF Refresh cycle time
64
64
ms
tREF Refresh cycle time(S-version ONLY)
128
128
ms
tRP
tRCD
tCRP
/RAS high pulse width
Delay time, /RAS low to /CAS low
Delay time, /CAS high to /RAS low
30
40
ns
(Note16) 14 37 14 45
ns
5
5
ns
tRPC Delay time, /RAS high to /CAS low
0
0
ns
tCPN /CAS high pulse width
8
10
ns
tRAD Column address delay time from /RAS low (Note17) 10 25 12 30
ns
tASR Row address setup time before /RAS low
0
0
ns
tASC Column address setup time before /CAS low (Note18) 0 10
0 13
ns
tRAH Row address hold time after /RAS low
8
10
ns
tCAH Column address hold time after /CAS low
8
10
ns
tDZC Delay time, data to /CAS low
(Note19) 0
0
ns
tDZO Delay time, data to /OE low
(Note19) 0
0
ns
tRDD Delay time, /RAS high to data
(Note20) 13
15
ns
tCDD Delay time, /CAS high to data
(Note20) 13
15
ns
tODD Delay time, /OE high to data
(Note20) 13
15
ns
tT
Transition time
(Note21) 1 50
1 50
ns
Note 14: The timing requirements are assumed tT =2ns.
15: VIH(min) and VIL(max) are reference levels for measuring timing of input signals.
16: tRCD(max) is specified as a reference point only. If tRCD is less than tRCD(max), access time is tRAC. If tRCD is greater than
tRCD(max), access time is controlled exclusively by tCAC or tAA. .
17: tRAD(max) is specified as a reference point only. If tRAD≥tRAD(max) and tASC≤tASC(max), access time is controlled exclusively by tAA.
18: tASC(max) is specified as a reference point only. If tRCD≥tRCD(max) and tASC≥tASC(max), access time is controlled exclusively by
tCAC.
19: Either tDZC or tDZO must be satisfied.
20: Either tRDD or tCDD or tODD must be satisfied.
21: tT is measured between VIH(min) and VIL(max).
MIT-DS-0233-0.0
MITSUBISHI
ELECTRIC
( 6 / 26 )
24/Jul./1998
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