MC88915T データシートの表示（PDF） - Motorola => Freescale
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MC88915T
Motorola => Freescale
MC88915T Datasheet PDF : 21 Pages
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MC88915TFN55 and MC88915TFN70 (continued)
FREQUENCY SPECIFICATIONS (TA =–40° C to +85° C, VCC = 5.0 V ±5%)
Guaranteed Minimum
Symbol
fmax 1
Parameter
Maximum Operating Frequency (2X_Q Output)
Maximum Operating Frequency (Q0–Q4,Q5 Output)
TFN70
70
35
TFN55
55
27.5
Unit
MHz
MHz
1. Maximum Operating Frequency is guaranteed with the part in a phase–locked condition, and all outputs loaded with 50Ω terminated to VCC/2.
AC CHARACTERISTICS (TA =–40° C to +85° C, VCC = 5.0V ±5%, Load = 50Ω Terminated to VCC/2)
Symbol
Parameter
Min
Max
tRISE/FALL
Outputs
Rise/Fall Time, All Outputs
(Between 0.2VCC and 0.8VCC)
1.0
2.5
tRISE/FALL1
Rise/Fall Time Into a 20pF Load, With Ter-
0.5
1.6
2X_Q Output
mination Specified in Note 2
tPULSE WIDTH1
(Q0–Q4, Q5, Q/2)
tPULSE WIDTH1
(2X_Q Output)
tPULSE WIDTH1
(2X_Q Output)
Output Pulse Width: Q0, Q1, Q2, Q3, Q4,
Q5, Q/2 @ VCC/2
Output Pulse Width:
2X_Q @ 1.5V
66MHz
50MHz
40MHz
Output Pulse Width:
2X_Q @ VCC/2
50–65MHz
40–49MHz
66–70MHz
0.5tCYCLE – 0.5 2
0.5tCYCLE – 0.5 2
0.5tCYCLE – 1.0
0.5tCYCLE – 1.5
0.5tCYCLE – 1.0 2
0.5tCYCLE – 1.5
0.5tCYCLE – 0.5
0.5tCYCLE + 0.5 2
0.5tCYCLE + 0.5 2
0.5tCYCLE + 1.0
0.5tCYCLE + 1.5
0.5tCYCLE + 1.0 2
0.5tCYCLE + 1.5
0.5tCYCLE + 0.5
tPD 1,3
SYNC Feedback
SYNC Input to Feedback Delay
(Measured at SYNC0 or 1 and
FEEDBACK Input Pins)
(With 1MΩ from RC1 to An VCC)
–1.05
–0.40
(With 1MΩ from RC1 to An GND)
+1.25
+3.25
tSKEWr 1,4
Output–to–Output Skew Between Outputs
—
500
(Rising) See Note 5 Q0–Q4, Q/2 (Rising Edges Only)
tSKEWf 1,4
Output–to–Output Skew Between Outputs
—
500
(Falling)
Q0–Q4 (Falling Edges Only)
tSKEWall1,4
Output–to–Output Skew 2X_Q, Q/2,
—
750
Q0–Q4 Rising, Q5 Falling
tLOCK5
Time Required to Acquire Phase–Lock
1.0
10
From Time SYNC Input Signal is
Received
tPZL6
Output Enable Time OE/RST to 2X_Q,
3.0
14
Q0–Q4, Q5, and Q/2
tPHZ,tPLZ6
Output Disable Time OE/RST to 2X_Q,
3.0
14
Q0–Q4, Q5, and Q/2
Unit
Condition
ns Into a 50Ω Load
Terminated to VCC/2
ns tRISE: 0.8V – 2.0V
tFALL: 2.0V – 0.8V
ns Into a 50Ω Load
Terminated to VCC/2
ns Must Use Termination
Specified in Note 2
ns Into a 50Ω Load
Terminated to VCC/2
ns See Note 4 and
Figure 2 for Detailed
Explanation
ps All Outputs Into a
Matched 50Ω Load
Terminated to VCC/2
ps All Outputs Into a
Matched 50Ω Load
Terminated to VCC/2
ps All Outputs Into a
Matched 50Ω Load
Terminated to VCC/2
ms Also Time to LOCK
Indicator High
ns Measured With the
PLL_EN Pin Low
ns Measured With the
PLL_EN Pin Low
1. These specifications are not tested, they are guaranteed by statistcal characterization. See AC specification Note 1.
2. TCYCLE in this spec is 1/Frequency at which the particular output is running.
3. The TPD specification’s min/max values may shift closer to zero if a larger pullup resistor is used.
4. Under equally loaded conditions and at a fixed temperature and voltage.
5. With VCC fully powered–on, and an output properly connected to the FEEDBACK pin. tLOCK maximum is with C1 = 0.1µF, tLOCK minimum is with
C1 = 0.01µF.
6. The tPZL, tPHZ, tPLZ minimum and maximum specifications are estimates, the final guaranteed values will be available when ‘MC’ status is reached.
MOTOROLA
5
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