M30201F6-XXXFP データシートの表示（PDF） - Mitsumi

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M30201F6-XXXFP

SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

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Appendix Standard Serial I/O Mode

Mitsubishi microcomputers

M30201 Group

SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

Status Register 1 (SRD1)

Status register 1 indicates the status of serial communications, results from ID checks and results from

check sum comparisons. It can be read after the SRD by writing the read status register command (7016).

Also, status register 1 is cleared by writing the clear status register command (5016).

Table DD-3 gives the definition of each status register 1 bit. “0016” is output when power is turned ON and

the flag status is maintained even after the reset.

Table DD-3. Status register 1 (SRD1)

y SRD1 bits

r SR15 (bit7)

SR14 (bit6)

SR13 (bit5)

a SR12 (bit4)

SR11 (bit3)

in SR10 (bit2)

Status name

Boot update completed bit

Reserved

Reserved

Checksum match bit

ID check completed bits

Definition

"1"

"0"

Update completed

Not update

-

-

-

Match

00

01

10

-

Mismatch

Not verified

Verification mismatch

Reserved

11 Verified

SR9 (bit1)

SR8 (bit0)

Data receive time out

Reserved

Time out

-

Normal operation

-

lim Boot Update Completed Bit (SR15)

This flag indicates whether the control program was downloaded to the RAM or not, using the down-

load function.

e Check Sum Consistency Bit (SR12)

r This flag indicates whether the check sum matches or not when a program, is downloaded for execu-

tion using the download function.

PID Check Completed Bits (SR11 and SR10)

These flags indicate the result of ID checks. Some commands cannot be accepted without an ID

check.

Data Reception Time Out (SR9)

This flag indicates when a time out error is generated during data reception. If this flag is attached

during data reception, the received data is discarded and the microcomputer returns to the command

wait state.

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