LTC4099EPDC データシートの表示（PDF） - Linear Technology

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LTC4099EPDC

I2C Controlled USB Power Manager/Charger with Overvoltage Protection

Linear Technology 

LTC4099

Applications Information

USB Inrush Limiting

Voltage overshoot on VBUS may sometimes be observed

when connecting the LTC4099 to a lab power supply. This

overshoot is caused by long leads from the power supply

to VBUS. Twisting the wires together from the supply to

VBUS can greatly reduce the parasitic inductance of these

long leads, and keep the voltage at VBUS to safe levels. USB

cables are generally manufactured with the power leads in

close proximity, and thus fairly low parasitic inductance.

Board Layout Considerations

The Exposed Pad on the backside of the LTC4099 package

must be securely soldered to the PC board ground. This

is the primary ground pin in the package, and it serves

as the return path for both the control circuitry and the

synchronous rectifier.

Furthermore, due to its high frequency switching

circuitry, it is imperative that the input capacitor, inductor,

and output capacitor be as close to the LTC4099 as pos-

sible, and that there be an unbroken ground plane under

the LTC4099 and all of its external high frequency compo-

nents. High frequency currents, such as the input current

on the LTC4099, tend to find their way on the ground plane

along a mirror path directly beneath the incident path on

the top of the board. If there are slits or cuts in the ground

plane due to other traces on that layer, the current will be

forced to go around the slits. If high frequency currents are

not allowed to flow back through their natural least-area

path, excessive voltage will build up and radiated emis-

sions will occur (see Figure 9). There should be a group of

vias directly under the grounded backside leading directly

down to an internal ground plane. To minimize parasitic

inductance, the ground plane should be as close as pos-

sible to the top plane of the PC board (layer 2).

The IDGATE pin for the external ideal diode controller has

extremely limited drive current. Care must be taken to

minimize leakage to adjacent PC board traces. 100nA of

leakage from this pin will introduce an additional offset

to the ideal diode of approximately 10mV. To minimize

leakage, the trace can be guarded on the PC board by

surrounding it with VOUT connected metal, which should

generally be less than 1V higher than IDGATE.

Battery Charger Stability Considerations

The LTC4099’s battery charger contains both a constant-

voltage and a constant-current control loop. The con-

stant-voltage loop is stable without any compensation

when a battery is connected with low impedance leads.

Excessive lead length, however, may add enough series

inductance to require a bypass capacitor of at least 1µF

from BAT to GND.

4099 F09

Figure 9. Higher Frequency Ground Currents Follow

Their Incident Path. Slices in the Ground Plane Cause

High Voltage and Increased Emissions

4099fd

30

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