
TIMING DIAGRAMS
Demultiplexed CMOS Outputs with Interleaved Update
All Outputs Are Single-Ended and Have CMOS Levels
LTC2240-12
ANALOG
INPUT
ENC–
ENC+
DA0-DA11, OFA
DB0-DB11, OFB
CLKOUTB
CLKOUTA
tAP
N
tH
N+1
tL
N+2
tD
N–6
tC
N–5
tD
tC
N–4
N+3
N+4
N–3
N–1
N–2
224012 TD03
Demultiplexed CMOS Outputs with Simultaneous Update
All Outputs Are Single-Ended and Have CMOS Levels
ANALOG
INPUT
ENC–
ENC+
DA0-DA11, OFA
DB0-DB11, OFB
CLKOUTB
CLKOUTA
tAP
N
tH
N+1
tL
tD
N–6
tD
N–5
tC
N+2
N+3
N–4
N–3
N+4
N–2
N–1
224012 TD04
224012fb
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