LAN8720AI データシートの表示（PDF） - SMSC -> Microchip

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LAN8720AI

Small Footprint RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support

SMSC -> Microchip 

Small Footprint RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support

Datasheet

5.5.4.2 RMII Timing (REF_CLK In Mode)

The 50MHz REF_CLK IN timing applies to the case when nINTSEL is floated or pulled-high. In this

mode, a 50MHz clock must be input on the CLKIN pin. For more information on REF_CLK In Mode,

see Section 3.7.4.1, "REF_CLK In Mode," on page 34.

CLKIN

(REF_CLK)

RXD[1:0],

RXER

CRS_DV

tclkp

tclkh tclkl

toval

toval

tohold

tsu tihold

tsu tihold

tohold

toval

tihold

TXD[1:0]

tihold

tsu

TXEN

Figure 5.5 RMII Timing (REF_CLK In Mode)

Table 5.10 RMII Timing Values (REF_CLK In Mode)

SYMBOL

tclkp

tclkh

tclkl

toval

tohold

tsu

tihold

DESCRIPTION

CLKIN period

CLKIN high time

CLKIN low time

RXD[1:0], RXER, CRS_DV output valid from

rising edge of CLKIN

RXD[1:0], RXER, CRS_DV output hold from

rising edge of CLKIN

TXD[1:0], TXEN setup time to rising edge of

CLKIN

TXD[1:0], TXEN input hold time after rising edge

of CLKIN

MIN

20

tclkp*0.35

tclkp*0.35

3.0

4.0

1.5

MAX

tclkp*0.65

tclkp*0.65

14.0

UNITS

ns

ns

ns

ns

NOTES

Note 5.17

ns

Note 5.17

ns

Note 5.17

ns

Note 5.17

Note 5.17 Timing was designed for system load between 10 pf and 25 pf.

Revision 1.4 (08-23-12)

72

DATASHEET

SMSC LAN8720A/LAN8720Ai

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